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n567g xxx release date: feb . 201 4 - 1 - ver sion a 1 3 table of contents 1. general description ................................ ................................ ................................ .......... 2 2. features ................................ ................................ ................................ ................................ . 3 3. family overvi ew ................................ ................................ ................................ ................... 5 4. pin description ................................ ................................ ................................ ..................... 7 5. item vs pin table ................................ ................................ ................................ ................... 8 6. block diagra m ................................ ................................ ................................ ...................... 9 7. electrical character istics ................................ ................................ ......................... 10 7.1 absolute maximum ratings ................................ ................................ ............................. 10 7.2 d . c . c haracteristics ................................ ................................ ................................ ......... 10 7.3 a . c . characteristics ................................ ................................ ................................ ......... 10 8. typical application circuits ................................ ................................ ......................... 12 9. revision history ................................ ................................ ................................ ................ 14
n567g xxx release date: feb . 201 4 - 2 - ver sion a 1 3 1. general description the n567g xxx is a powerful microcontroller (uc) dedicated to speech and melody synthesis applications. with the help of the embedded 8 - bit micropro cessor & dedicated h/w, the n567g xxx can synthesize 4 - channel speech+melody simultaneously. the two channels of synthesized speech can be in different kinds of format, for example adpcm and mdpcm. the n567g xxx can provide 4 - channel high - quality wavetable melody , which can emulate the characteristics of musical instruments, such as piano and violin. more colorful melody effects are implemented in n567g xxx series, such as modulation, vibrato, and pitch - bending etc. the output of speech/melody channels are mi xed together through the on - chip digital mixer to produce colorful effects. with these hardware resources, the n567g xxx is very suitable for high - quality and sophisticated scenario applications. the n567g xxx provides at most 32 i/o pins , 384 bytes ram , ir carrier , serial interface management (sim), and more sophisticated applications, such as interactive toys, cartridge toys and final count down function. 3 - pair led output pins with 64 - level control means that numerous combination of rgb colors may result in a versatility of colorful effects. in addition, n567g xxx also provides pwm mode audio output to save power during playback and watch dog timer to prevent latch - up situation occurring. the n567g xxx family contains several items with different playback d uration as shown below: (@ 4 - bit nm4 algorithm, 6 khz sampling rate) item n567g 0 30 n567g 0 41 n567g 080 n567g 1 2 0 n567g 1 6 0 n567g 200 * duration 34 sec. 4 4 sec. 8 4 sec. 1 24 sec. 1 5 8 sec. 192 sec. item n567g 240 n567g 2 80 n567g 330 ** n567g 1 2 1 ** n567g 1 6 1 ** n567g 20 1 *duration 2 33 sec. 2 72 sec. 3 11 sec. 1 24 sec. 1 5 8 sec. 192 sec. note: *: the duration time is based on 4 - bit nm4 at 6 khz sampling rate. the firmware library and timber library have been ex cluded from users rom space for the duration estimation. note: ** : n567g 121/161/ 201 are modified from n567g 120/160/ 200 respectively to consist with otps pad sequence.
n567g xxx release date: feb . 201 4 - 3 - ver sion a 1 3 2. features ? wide range of operating voltage: ? 8 mhz @ 3. 0 volt ~ 5.5 volt ? 6 mhz @ 2.4 volt ~ 5.5 volt oscillator ? trim function - build in rosc and s ystem clock setting: 4mhz, 6mhz or 8mhz by mask option ? x tal oscillator C o nly in n567g 240/280/330 /041/030 by mask option ? add external cry s tal 8mhz~16mhz for system clock 4m~8mhz ? power management: ? 4 ~ 8 mhz system clocks, with ring type or crystal type. ? stop mo de for stopping all ic operations ? status changes of the ip0 and bp0~bp2 pins can wake up the chip ? provides up to 8 inputs and 24 i/o pins ? n567g 03 0~ 20 1 : 24i/o ? n567g 240~330: 8i + 24i/o ? audio output : 1 speaker outputs , mono effect availabl e ? dac : maximu m output is 3ma/5ma , ( 1 0+3) - bit without nois e shaping to drive speaker output . ? pwm: d irect drive 12 bit with noise shapin g to save power consumption . ? f/w speech synthesis: ? multiple format parser that supports ? new 4 - bit mdpcm(nm4) , 5 - bit mdpcm (mdm) , 4 - bit mdpcm(md4), 4 - bit adpcm (apm), 8 - bit log pcm (lp8) algorithm can be used ? pitch shippable adpcm for voice changer application ? dual - sample rate voice synthesis ? f/w melody synthesis: ? 6 melody channels that can emulate characteristics of musical instrument s ? multi - midi files simultaneous ? multi - midi channels dynamic control ? more midi events are supported for colorful melody playback, such as modulation wheel, pitch - bending, pedal, pitch - shift, and vibrato etc. ? speech and melody can be playing at the same ti me ? 2 channels speech + 2 channels wavetable melody ? 1 channel speech + 3 channels wavetable melody ? 4 channels wavetable melody ? built - in ir carrier generation circuit for simplifying firmware ir application ? built - in timerg 1 for general purpose applicatio ns ? harmonized synchronization among midi, speech, led, and motor ? build - in 3 - pair led outputs with 64 - level control of brightness in n567g 240~ 330 ? bp00/0 2 /0 4 are defined as 3 h/w pwm i/o pi ns. they can be paired with bp0 1 /0 3 /05 respectively by same (or o pposite) phase of output waveform ? built - in watch - dog timer (wdt) and low voltage reset (lv r ) by mask option
n567g xxx release date: feb . 201 4 - 4 - ver sion a 1 3 ? provide serial interface management (sim) to access the external memory in n567g 03 0~ 080 and n567g 240~330 ? w55f, w551c ? spi flash /rom ? support pow erscript tm for developing codes in easy way ? full - fledged development system ? source - level ice debugger (assembly & powerscript tm format) ? ultra i/o tm tool for e vent synchronization mechanism ? ice system with usb port ? user - friendly gui environment ? availabl e package form: ? cob is essential
n567g xxx release date: feb . 201 4 - 5 - ver sion a 1 3 3. family overview the characteristics of n567g xxx series are depicted in table 1. part number n567g 0 30 n567g 041 n567g 080 n567g 120 , / n567g 121 n567g 160 / n567g 161 rom (byte) 126 k 158 k 286 k 416 k 528 k ram (byte) 384 384 384 3 84 384 duration 1 34 sec 4 4 sec 8 4 sec 1 24 sec 1 5 8 sec system clock trim /x 2 0 : 24 0 : 24 0 : 24 0 : 24 0 : 24 audio output dac pwm dac pwm dac pwm dac pwm dac pwm speaker 1 1 1 1 1 mixer input 4 4 4 4 4 synthes is algorithm mdpcm a dpcm pcm mdpcm a dpcm pcm mdpcm a dpcm pcm mdpcm a dpcm pcm mdpcm a dpcm pcm ir - carrier (tx) ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? 1 the f/w library & program code are excluded from the rom space for the duration estimate, which is based on 6 - khz sample rate & 4 - bit nm4 algorithm. 2 "in" is the number of input pins; "bid" is the number of bi - directional pins.
n567g xxx release date: feb . 201 4 - 6 - ver sion a 1 3 part number n567g 200 / n567g 201 n567g 240 n567g 280 n567g 330 rom (byte) 638 k 768k 896 k 1022 k ram (byte) 384 384 384 384 duration 192 sec 2 33 sec 2 72 sec 3 11 sec system clock trim trim /x ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? note *: bp00/0 2 /0 4 are defined as 3 h/w pwm i/o pins. they can be paired with bp0 1 /0 3 /05 respectively by same (or opposite) phase of output waveform table 1 : n567g xxx family selection guide
n567g xxx release date: feb . 201 4 - 7 - ver sion a 1 3 4. pin description pin name i/o function /reset in ic reset input with an internal pull - up resistor , low a ctive. osc in i main - clock oscillation input for x tal mode . build - in rosc by mask option. oscout o main - clock oscillation out put for x tal . ip00~ip07 in general input port with pull - high selection. each input pin can be programmed to generate interrupt request and used to release ic from stop mode. it is provided in n567g 240~330 only. bp0 0~bp07 i/o general input/output pins. when used as output pin, it can be open C drain or cmos type and it can sink 25 ma for high - current applications. when used as input pin, there may have a pull - high option and generate interrupt request to release ic from stop mode. when bp07 is used as output pin, it can be the ir transmission carrier for ir applications. only for n567g 240/280/330 . bp0 0/0 2 /0 4 can be set as 3 - pin h/w p wm output with 64 - level resolution. they can be paired with bp0 1 /0 3 /05 (also h/w pwm output) respectively with same or opposite phase of output waveform. bp10~bp17 i/o general input/output pins. when used as output pin, it can be open C drain or cmos type. when used as input pin, there may have a pull - high option and generate interrupt request to release ic from stop mode. when serial interface management (sim) is enabled , and set memory type as w55f/w551c , bp 1 0~12 are used to be an interface with the exter nal memory, w55fxx or w551cxxx . if set memory to spi flash, bp 1 0~13 are used to be an interface . bp20~bp27 i/o general input/output pins. when used as output pin, it can be open C drain or cmos type. when used as input pin, there may have a pull - high opti on and generate interrupt request to release ic from stop mode. pwm + /dac o pwm driver positive output or current type dac output pwm - o pwm driver negative output v dd power positive power supply for up and peripherals. vss power negative power supply f or up and peripherals. vdd _ spk power positive power supply for speaker driver. vss _ spk power negative power supply for speaker driver. vdd _sim power positive power supply for serial interface management (sim) bp1 0~13 only providing in n567g 240~ n567g 330 . for non - sim application, it should be connect to v dd to keep normal standby current. vdd_osc power positive power supply for oscillator . only providing in n567g 240~ n567g 330. it must be connected to vdd. vss_osc power negative power supply for oscillato r . only providing in n567g 2 40~ n567g 330. this pad must be connected to vss.
n567g xxx release date: feb . 201 4 - 8 - ver sion a 1 3 5. item vs pin table pin name h 030/041 h 080 h 120/160/200 h 121/161/201 h 240/280/330 comment bp0 0~0 7 v v v v bp1 0~1 7 v v v v bp2 0~2 7 v v v v ip0 0~0 7 - - - v / reset v v v v pwm + /dac v v v v pwm - v v v v oscin v v v v oscout v - - v c rystal mode vdd v v v v vss v v v v vdd_spk v v v v support speaker power vss_spk v v v v vdd_sim - - - v s upport bp1 0~1 3 sim interface power vdd_osc - - - v support oscin/out powe r vss_osc - - - v
n567g xxx release date: feb . 201 4 - 9 - ver sion a 1 3 6. block diagram
n567g xxx release date: feb . 201 4 - 10 - ver sion a 1 3 7. electrical character istics 7.1 absolute maximum ratings parameter rating unit supply voltage to ground potential - 0.3 to +7.0 v d.c. voltage on any pin to ground potential - 0.3 to v dd +0.3 v operating temperatur e 0 to +70 ? c storage temperature - 55 to +150 ? c note: exposure to conditions beyond those listed under absolute maximum ratings may adversely affect the life and reliability of the device. 7.2 d . c . c haracteristics (v dd ? v ss = 4.5 v, f m = 8 mhz, ta = 25 ? parameter sym . test conditions spec. unit m in . t yp . m ax . operating voltage v dd f sys = 6 mhz 2.4 - 5.5 v f sys = 8 mhz 3. 0 - 5.5 v operating current i op f sys = 8mhz , normal operation - 8 12 m a standby current i sb stop mode - 1 2 ? a input low voltage v il all input pins v ss - 0.3 v dd v input high voltage v ih all input pins 0.7 v dd - v dd v input current i/o pins i in 1 v in = 0v , pulled - high resistor = 500k ohm - 5 - 9 - 14 ? a input current i/ o pins i in 2 v in = 0v , pulled - high resistor = 150k ohm - 15 - 30 - 45 ? a output current (bp0) i ol v dd = 3v, v out = 0.4v 8 12 - ma i oh v dd = 3v, v out = 2.6v - 4 - 8 - ma i ol v dd = 4.5 v, v out = 1.0 v - 35 - ma i oh v dd = 4.5 v, v out = 3.5 v - - 20 - ma output current (bp1, bp2) i ol v dd = 3v, v out = 0.4v 4 6 - ma i oh v dd = 3v, v out = 2.6v - 4 - 8 ma i ol v dd = 4.5 v, v out = 1.0 v - 15 - ma i oh v dd = 4.5 v, v out = 3.5 v - - 20 - ma dac full scale current i dac v dd = 4.5v, rl = 100 ? - 2.4 - 4.0 - 3.0 - 5.0 - 3.6 - 6.0 ma output current pwm+ / pwm - i ol1 rl= 8 ohm, [pwm+] --- [rl] --- [pwm - ] +200 - - ma ioh1 - 200 - - ma 7.3 a . c . c haracteristics (v dd - v ss = 4.5 v, f m = 8 mhz, ta = 25 ? parameter sym . test conditions spec. unit
n567g xxx release date: feb . 201 4 - 11 - ver sion a 1 3 m in . t yp . m ax . main - clock f m rosc build - in, @3.0~5.5v 3973 4096 4218 k hz rosc build - in, @3.0~5.5v 5959 6144 6328 rosc build - in, @3.0~5.5v 7946 8 192 8437 main - clock f m rosc build - in, @2.4~3.6v 3973 4096 4218 khz rosc build - in, @ 2.4~3.6v 5959 6144 6328 main - clock wake - up stable time t wsm 2^16 clock cycle 8 16 ms
n567g xxx release date: feb . 201 4 - 12 - ver sion a 1 3 8. typical application circuit s (a) trim ring oscillator application notes: 1. rosc is built in n567g chip internally. user needn t connect rosc resistor to oscin pin. 2. t he c1 value is suggested 4.7uf for audio pwm output or 0.1uf for dac output. 3. the rs value is suggested in 270 ? ~ 1k ? to limit too large dac output current flowing into transistor. 4. the vdd_osc pad must be connected to vdd. to add a 0.1uf capacitor to vss is optional to improve oscillator stability. 5. the vdd_sim pad must be connected to vdd for non - sim application. 6. the above application circuits are for reference only. no warranty for mass production.
n567g xxx release date: feb . 201 4 - 13 - ver sion a 1 3 (b) crystal application notes: 1. the crystal value must be dou ble of system clock. if system clock is 6m hz , please select 12m hz crystal device. the crystal should be placed close to ic, and the location is as near as possible. 2. the value of cp1 and cp2 are depended on pcb layout and crystal type suggested 15~30pf or s kip. 3. the c1 value is suggested 4.7uf in audio pwm output and 0.1uf in dac output. 4. the vdd_osc pad must be connected to vdd. 5. the vdd_sim pad must be connected to vdd if without sim application . 6. the above application circuits are for reference only. no warr anty for mass production. 7. other application circuits please refer to design guide.
n567g xxx release date: feb . 201 4 - 14 - ver sion a 1 3 (c) pcb layout guide 1. the ic substrate should be connected to vss in pcb layout. but vss_spk can t connect with ic substrate directly. both vss and vss_spk tie together in batt ery negative power. 2. each vdd , vdd_osc, vdd_sim and vdd_ spk pad must connect to positive power to support stable voltage for individual function work successfully. (don t let them floating) 9. revision histor y version date substantial change s page a 0 .0 ju ne 200 9 preliminary release. a1 .0 july 2009 ? sim is provided in n567g 040~ 080. ? pwm speaker output is provided in n567g 040~ 080. a2 .0 aug. 2009 ? add vddosc and vssosc in the pin description ? remove test pad in the pin description ? modify n567g 240~ 330 applicat ion circuit a3 .0 aug. 2009 ? modify frequency deviation in 5.3 a . c . characteristics . a4 .0 aug . 2009 ? m odify main clock and frequency deviation condition in 5.3 a . c . c haracteristics . a 5 .0 sep. 2009 ? m odify main clock and frequency deviation condition in 5 .3 a . c . c haracteristics. a 6 .0 oct. 2009 ? remove lvd function in 2 features a 7 .0 nov. 2009 ? revise frequency deviation value of 2.4~3.6v in section 5.3 a.c. characteristics. a 8 .0 feb. 2011 ? remove n567g 240~330 spio function except n567g 000 ice chip ? v dd_s pio/vss_spio and vdd_sim/vss_sim pin s must be connect to v dd /v ss to keep normal standby current. ? update output current for bp1/2 @4.5v/3.0v and update bp0 @4.5v ? update 4.7uf is optional as power stability on dac application on application circuit ? update 4 .7uf is necessary as power stability on pwm application on application circuit 11 5 7 9 10 a 9 .0 apr. 2011 ? add n567g xx chip family overview ? add sim spi flash application circuit for n567g 040~ 080 ? update application circuit and note description ? add power circuit in pcb layout ? n567g 240~330 modify vdd_spi pad to vdd2 which must be connecte d to vdd.(please refer bonding p ad diagram rev. a1) 5~6 13 11~18 18 7
n567g xxx release date: feb . 201 4 - 15 - ver sion a 1 3 important notice nuvoton products are neither intended nor warranted for usage in sy stems or equipment, any malfunction or failure of which may cause loss of human life, bodily injury or severe property damage. such applications are deemed, insecure usage. insecure usage includes, but is not limited to: equipment for surgical implement ation, atomic energy control instruments, airplane or spaceship instruments, the control or operation of dynamic, brake or safety systems designed for vehicular use, traffic signal instruments, all types of safety devices, and other applications intended t o support or sustain life. all insecure usage shall be made at customers risk, and in the event that third parties lay claims to nuvoton as a result of customers insecure usage, customer shall indemnify the damages and liabilities thus incurred by nuvo ton.

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